Research on manufacturing process of spin orbit torque magnetic random access memory

Spin orbit torque magnetic random access memory (SOT-MRAM) represents a next-generation spintronic memory technology, evolving from the field-switched Toggle-MRAM and spin transfer torque (STT) MRAM. Its cell device shows an intrinsic switching speed of up to the sub-nanosecond level, meanwhile the separated read/write path provides higher reliability and greater design flexibility, making it an ideal candidate for constructing non-volatile high-speed cache (L1‒L3 Cache). However, SOT-MRAM remains in the research and development phase, with only a few test chips released, and a series of hurdles need to be addressed before achieving mass production. Especially in terms of manufacturing processes, the ultra-thin SOT channel layer, the top-pinned tunnel junction film stack with dozens of layers of materials, and the hybrid integration between CMOS process and magnetic special process, etc., pose significant challenges to the wafer-level manufacturing of SOT-MRAM. This article focuses on comprehensively elaborating the wafer-level manufacturing process of SOT-MRAM, examining the key issues and challenges related to material systems, film stack etching, and hybrid integration.

自旋轨道转矩磁随机存取存储器（Spin orbit torque magnetic random access memory, SOT-MRAM）是一种下一代自旋电子存储技术，演进自场翻转式翻转磁随机存取存储器（Toggle-MRAM）与自旋转移转矩（spin transfer torque, STT）磁随机存取存储器。其单元器件本征开关速度最高可达亚纳秒级，同时分离式读写路径具备更高的可靠性与更优异的设计灵活性，使其成为构建非易失性高速缓存（L1-L3缓存）的理想候选方案。然而，SOT-MRAM目前仍处于研发阶段，仅推出过少量测试芯片，距离实现大规模量产仍需攻克一系列技术难关。尤其是在制造工艺层面，超薄SOT沟道层、数十层材料堆叠的顶钉扎隧道结薄膜叠层，以及CMOS工艺与磁性特种工艺的混合集成等问题，均对SOT-MRAM的晶圆级制造构成了严峻挑战。本文着重全面阐述SOT-MRAM的晶圆级制造工艺，探讨其在材料体系、薄膜叠层刻蚀以及混合集成等领域面临的关键问题与技术挑战。