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How to Prevent Flight Hardware Failures During Shock Qualification Test?

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DataCite Commons2024-02-25 更新2025-04-16 收录
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http://dataverse.jpl.nasa.gov/citation?persistentId=doi:10.48577/jpl.OZAKA7
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In the last few years, there have been several recorded JPL hardware failures during shock qualification tests. These failures raised concerns amongst project management, cognizant engineers, analysts, and others stake holders. These concerns were wrongfully attributed by some to potential over-test using JPL’s tunable beam shock simulation system (TBSS), a conclusion that was not shared by experienced subject matter experts. All the failures from cases examined were traced to issues unrelated to the TBSS. The prime failure mode was traced, in most cases, to excessive sustained structural excitations occurring in mid- to high-frequency shock regions. Other issues were related to overly conservative requirements (in particular specification of the knee frequencies), over-test by test conductors, possible fixture coupling, and design deficiencies. In this paper, root causes of a few flight hardware failures are discussed in detail. A series of recommendations are provided to better prepare for shock tests and to help minimize or even eliminate flight hardware failures.

近年来,喷气推进实验室(JPL)的硬件在冲击合格性测试中发生了多起有记录的故障。这些故障引发了项目管理层、责任工程师、分析师及其他利益相关者的担忧。一些人错误地将这些担忧归因于使用JPL可调光束冲击模拟系统(TBSS)可能导致的过度测试,这一结论并未得到经验丰富的主题专家认可。所有被检查案例中的故障均被追溯至与TBSS无关的问题。在大多数情况下,主要故障模式可追溯至中高频冲击区域发生的过度持续结构激励。其他问题则与过于保守的要求(尤其是拐点频率(knee frequencies)的规范)、测试人员的过度测试以及设计缺陷有关。本文详细讨论了若干飞行硬件故障的根本原因,并提供了一系列建议,以更好地为冲击测试做准备,帮助减少甚至消除飞行硬件故障。
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2024-02-25
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