Development of Advanced Ferroelectric Memory and Applications

This dissertation presents the development and application of back-end-of-line (BEOL) compatible ferroelectric memory technologies, focusing on high-density 3D integration and novel compute-in-memory (CiM) applications. As data continues to grow exponentially, there is a pressing need for memory solutions that are not only high-performing and scalable but also compatible with current manufacturing processes. This work delves into the utilization of Hafnium Zirconium Oxide (HZO) in Metal-Ferroelectric-Metal (MFM) capacitors, addressing key challenges in ferroelectric memory technology such as endurance, reliability, and device miniaturization. Innovative architectures such as the 2 Transistor multiple Capacitor (2TnC) structure have been explored to enhance memory density and operational efficiency. These structures enable quasi-nondestructive readout (QNRO) mechanisms that improve read cycle performance without compromising the write efficiency. Furthermore, the study expands on the integration of these technologies in both 2D and 3D array configurations, showcasing their potential in overcoming the limitations of traditional planar memory solutions. Beyond planar implementations, this dissertation details a vertical 2T-nC FeRAM architecture, experimentally confirming the feasibility of 3D stacking to further boost memory density. Additionally, the feasibility of ferroelectric memory in CiM architectures is demonstrated, highlighting the role of ferroelectric programmable majority gates within neural networks. This integration suggests a promising avenue for reducing the data movement bottleneck prevalent in von Neumann architectures, hence enhancing computational efficiency at reduced power consumption. Oxide-channel ferroelectric thin-film transistors (FeTFTs) are introduced as a novel approach to BEOL-compatible memory. These devices demonstrate both reprogrammable modes and one-time programmability (OTP), opening new opportunities for applications that require combined security and reconfigurability. Finally, an optimized vertical 2TnC FeRAM incorporating a BEOL read transistor is showcased, reinforcing the promise of ferroelectric memory for next-generation, large-scale computing platforms.

本论文阐述了与后端制程（back-end-of-line, BEOL）兼容的铁电存储器技术的开发与应用，重点关注高密度三维集成与新型存算一体（compute-in-memory, CiM）应用场景。随着数据呈指数级增长，市场对存储器解决方案提出了迫切需求：不仅需要具备高性能与可扩展性，还需兼容现有制造工艺。本研究探讨了铪锆氧化物（Hafnium Zirconium Oxide, HZO）在金属-铁电体-金属（Metal-Ferroelectric-Metal, MFM）电容器中的应用，针对性解决铁电存储器技术中的循环耐久性能、可靠性与器件微型化等关键挑战。本研究探索了2晶体管多电容（2 Transistor multiple Capacitor, 2TnC）等创新架构，以提升存储器密度与运行效率。此类架构可实现准非破坏性读取（quasi-nondestructive readout, QNRO）机制，在不降低写入效率的前提下优化读取周期性能。此外，本研究拓展了该类技术在二维与三维阵列架构中的集成应用，展示了其突破传统平面型存储器方案局限的潜力。相较于平面型实现方案，本论文详细阐述了一种垂直型2T-nC铁电随机存取存储器（Ferroelectric Random Access Memory, FeRAM）架构，并通过实验验证了三维堆叠以进一步提升存储器密度的可行性。此外，本研究验证了铁电存储器在存算一体（CiM）架构中的应用可行性，重点阐释了铁电可编程多数表决门在神经网络中的作用。此类集成方案为缓解冯·诺依曼架构中普遍存在的数据移动瓶颈提供了极具前景的路径，进而在降低功耗的同时提升计算效率。本研究还提出了一种兼容BEOL制程的新型存储器方案——氧化物通道铁电薄膜晶体管（Oxide-channel ferroelectric thin-film transistors, FeTFTs）。该类器件兼具可重编程模式与一次性可编程（one-time programmability, OTP）特性，为同时需要安全性与可重构性的应用场景开辟了全新机遇。最后，本研究展示了一款集成BEOL读取晶体管的优化型垂直2TnC铁电随机存取存储器，进一步印证了铁电存储器在下一代大规模计算平台中的应用前景。