FPGA - CPU whole-system benchmark dataset: AMD Alveo U50 vs. dual Intel Xeon Gold 5318Y (per-rail power traces, run metadata, code and analysis for six workloads)

Raw measurements, code and analysis behind the paper "Faster is not greener: predicting when a PCIe FPGA card beats its host server in time and energy" (Journal of Systems Architecture, under review). 2,188 measured runs of six workloads (AES-256-CTR, 3x3 convolution, Monte Carlo Heston option pricing, a two-stage Monte Carlo portfolio valuation, and two live-video pipelines) on an AMD Alveo U50 card and its dual-socket Intel Xeon Gold 5318Y host. Each run has its metadata, a 10 Hz per-rail power trace (both CPU packages, both DRAM domains and the FPGA card) and the program output. The record also contains the HLS kernels, host programs, optimised CPU baselines, the measurement harness, Vivado reports, the analysis scripts that reproduce every number and figure of the paper, and Supplementary File S1 (a methodology audit of 30 FPGA-vs-CPU papers). Unzip all parts into one folder; see README.md for the file list and how to reproduce the results. Code: https://github.com/randikat33/u50-fpga-cpu-benchmark