Adaptive Hybrid SRAM-PUF and CFO Authentication for LoRaWAN: Hardware Scripts and Analysis Pipeline

Hardware capture scripts, Arduino firmware, raw power-up captures and thecorrected analysis pipeline for empirical characterisation of SRAM-PUF andcarrier-frequency-offset RF fingerprinting authentication on LoRaWAN-classhardware. The testbed comprises Adafruit Feather M0 RFM95W and STM32B-L072Z-LRWAN1 modules, each paired with Microchip 23K640 external SRAMchips, and an RTL-SDR Blog V3 receiver at 868.1 MHz. This version supersedes v1.0.0, v2 and v3 following an audit of the analysispipeline in August 2026. Two faults were found and corrected: animpostor-labelling error that recorded the same physical SRAM chip read on asecond host board as a different device, and an invalid 3.6 V capture sessionin which the SPI read truncated part-way through the address range. Statisticsaffected by either fault are withdrawn. CORRECTIONS.md in this deposit listsevery withdrawn value and its replacement; do not cite figures from theearlier versions. The pipeline is deterministic given seed 20260811 (NumPy 2.0.2, pandas 2.2.2,Python 3.12.13) and includes a self-verification block that re-derives everyheadline statistic from the raw captures and fails on any drift. Corrected headline values for the SRAM-PUF characterisation: genuine held-outHamming distance 4.18% (95% CI [3.47, 5.07], n = 598); cross-platform 13.94%(n = 598) with a measured false-rejection rate of 0.00% at a 15% threshold;different-chip impostor 45.98% (n = 1,196). Across the manufacturer's rated2.7-3.3 V supply range the result is null: bit error rate 3.74-5.67%, falseacceptance and false rejection both 0.00%.