Study of SiGe hetero-junction based TFET for Realization of Boolean Function

Abstract:In this paper, a Dual pocket-double gate TFET (DP-DGTFET) is proposed to enhance the drain current. By using 2-D simulations, it is shown that logic functions can be realized through single DGTFET by taking different supply voltage and work functions. The OR and NAND logic functions are realized with n-type and p-type DGTFET respectively by biasing both gates independently for different input logic combinations. Whereas, the AND and NOR logic functions are realized by introducing gate-source overlap technique in the n-type and p-type DGTFET. Four input combinations 00, 01, 10, and 11 are applied to both gates independently, and their energy band diagram and I-V transfer characteristics of the device are plotted to analyze the behavior of each logic function. The high electron tunneling and hence high IONimplies high logic '1', whereas low electron tunneling and low current implies low logic '0'. The energy band diagram shows maximum tunneling for the input combinations '11' in OR logic implementation and in case of NOR logic function implementation, high ION is obtained for the input combination of 00, and it gives ION/IOFF ratio in the range of 108. For OR and NAND functions ION/IOFF ratio enhanced to ~1012. This paper shows a compact logic functions implementation using the single TFET device.