Logic Shrinkage: Learned FPGA Netlist Sparsity for Efficient Neural Network Inference [Artefact Evaluation]
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下载链接：
https://zenodo.org/record/5595285
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资源简介：
Source code of paper "Logic Shrinkage: Learned FPGA Netlist Sparsity for Efficient Neural Network Inference" submitted to FPGA'22 for artefact evaluation.
创建时间：
2021-11-23
