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Error rate of different page types across P/E cycles

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DataCite Commons2026-04-23 更新2026-05-05 收录
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资源简介:
This dataset corresponds to 3D TLC NAND flash memory chips subjected to 4,000 program/erase (P/E) cycles and 3D QLC NAND flash memory chips subjected to 3,000 P/E cycles, respectively. Using the test logic integrated within the SOPC system, erase operations were first performed on the test blocks, followed by writing random data. The data was then read back, and the raw bit error rate was statistically analyzed according to different page types. Finally, the error rate variation curve was plotted as shown in the figure.
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Science Data Bank
创建时间:
2026-04-23
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