Paper data of Chao Wang
收藏IEEE2026-04-17 收录
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https://ieee-dataport.org/documents/paper-data-chao-wang
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资源简介:
This paper introduces a novel dual-signal air-filled transmission line (DS-AFTL) designed for high-speed inter-chip connections, operating from DC to the terahertz frequency range. Fabricated using low-cost print circuit board (PCB) technology, the proposed structure features a three-layer substrate configuration. Within this configuration, two thick copper layers are strategically integrated to create air cavities. This design ensures that both parallel signal lines are entirely surrounded by air, significantly reducing transmission losses. Additionally, the dual-signal lines are linked via a row of metallic vias, which not only homogenizes current distribution across the structure but also minimizes the conductive losses, thereby further mitigating the total losses. Simulation and experimental results comparing with the conventional coplanar waveguide (CPW) show that the DS-AFTL achieves 59% lower insertion loss than a CPW with same dimensions. Specifically, the proposed structure exhibits an insertion loss of 0.132 dB\/mm at 110 GHz and maintains a reflection coefficient below -10 dB across the entire DC-to-110 GHz bandwidth. This substantial performance improvement positions the DS-AFTL as a prime candidate for high-speed, short-distance chip-to-chip interconnections in advanced packaging applications.
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Chao Wang



