Bandwidth and stability analysis of cryogenic front-end transimpedance amplifiers for HgCdTe infrared detectors

ObjectiveMercury cadmium telluride (HgCdTe) infrared detectors are widely adopted in aerospace, environmental monitoring, and medical imaging because of their high sensitivity and broadband response. Their performance critically hinges on the bandwidth and stability of cryogenic front-end transimpedance amplifier (TIA) circuits. At low temperatures, variations in the unity-gain bandwidth of operational amplifiers, feedback resistance, and compensation capacitances alter loop dynamics, often introducing dual-pole resonance, gain peaking, and even oscillation. This work aims to clarify the instability mechanism of cryogenic TIAs, establish compensation rules, and provide a practical design methodology that sustains high transimpedance gain together with stable wideband operation.MethodsA systematic procedure integrating modeling, analysis, and validation was adopted. Firstly, an equivalent model was constructed for the photodiode-TIA interface to reveal the existence of the L-C resonant circuit. Bode plot analysis was then used to reveal that without compensation, the loop exhibited a coincident dual-pole near the resonance frequency, producing a −40 dB/dec slope at the crossover and 360° net phase shift, a root cause of oscillation (Fig.3). A phase-compensation capacitor in the feedback path was introduced to create a stabilizing zero, separate the two poles, and reshape the loop slope to −20 dB/dec at the crossover (Fig.4). Given the large output capacitive load that is frequently present in cryogenic measurement chains (e.g., Dewar flask and cabling), the output load was explicitly considered. The amplifier thereby behaved as a single-pole device dominated by the output pole within its unity-gain bandwidth. On the basis of this behavior, analytical expressions were derived for the critical compensation capacitance that maximized bandwidth. Furthermore, the optimal capacitance was identified as the value that maintained a damping ratio close to 0.707, eliminating gain peaking and yielding the broadest flat response among capacitances (Fig.5). Simulations were conducted under different combinations of input parasitic capacitances and output loads, corresponding to the conditions listed in Tab.2 and Fig.6, to verify the effectiveness of the theoretical analysis. The TIA employed a cascode operational amplifier whose low-frequency open-loop gain and transconductance were characterized. Summary parameters and unity-gain bandwidths under different loads are reported in Tab.1. Finally, seven TIA variants with different feedback networks and compensations were fabricated in the 500 nm CMOS process of CSMC and measured in a cryogenic Dewar flask. The measured –3 dB bandwidths were compared against analytical predictions and simulations (Tab.4), and a simple calibration for effective compensation capacitance was extracted from data (Fig.8, Tab.5).Results and DiscussionsAnalysis showed that a properly selected compensation capacitor spread coincident poles and suppressed the resonance responsible for oscillation. The critical capacitance value maximized the closed-loop bandwidth but induced gain peaking. Meanwhile, the optimal capacitance value removed peaking while maintaining maximal bandwidth. Simulation results acquired under multiple combinations of input capacitance and output load confirmed these trends. The calculated critical capacitances and corresponding bandwidths agreed with simulations in terms of magnitude and trend (Fig.6), with typical deviations within a few tens of percent depending on load conditions, whereas the results obtained with the load-dependent formulation exhibited improved overall consistency. Under optimal compensation, simulated bandwidths tracked analytical estimates with stable, peak-free responses (Tab.3). Chip-level cryogenic tests further substantiated the proposed analysis and calculation methods. Seven groups of fabricated TIA circuits were tested at 83 K, yielding measured bandwidths between 4.5 and 13 kHz (Tab.4). Comparison with the calculated values revealed systematic deviations, which were attributed to a consistent offset in the effective compensation capacitance. After this calibration was applied, the calculated and measured bandwidths matched closely, with relative errors reduced to within 11% (Tab.5, Fig.8). At room temperature, gain peaking was observed in a configuration whose effective compensation capacitance was between the analytically predicted critical and optimal values, i.e., a stable yet peaking region (Fig.9 (a)). For the same die at 83 K, the effective compensation capacitance exceeded the cryogenic optimal value, and no gain peaking was observed (Fig.9 (b)), supporting the capacitance calibration step and the optimal compensation analysis.ConclusionsThis study elucidated the dual-pole origin of instability in cryogenic TIAs for HgCdTe detectors and proposed a practical design methodology. Flat wideband response can be achieved under substantial output loads by introducing a stabilizing feedback zero with the damping-ratio-guided sizing of the compensation capacitor. Analytical guidelines were verified through simulation and cryogenic chip-level tests. At 83 K, the fabricated TIAs exhibited bandwidths of 4.5-13 kHz, with maximum performance reaching 29 MV/A gain and 13 kHz bandwidth. Although deviations from the calculated results were observed, a consistent offset in the effective compensation capacitance was identified. After calibration, the theoretical, simulated, and measured results showed good agreement. This work provides a reliable theoretical basis and practical guidance for the design and optimization of cryogenic front-end readout circuits in HgCdTe infrared detectors.