Assessment of dual oxide options for LDMOS transistors in FinFET technology

This is the repository containing the datasets relative to the publication: A. Ruggieri, L. Tondelli, and L. Selmi, “Assessment of dual oxide options for LDMOS transistors in FinFET technology,” INFOS 2025-Granada. In this folder you will find the .csv files containing data of the TCAD simulated structures: 2nm_Ib: bulk current vs gate voltage of all the structure TO, tO and DO; 2nm_IgVg: gate current vs gate voltage of all the structure TO, tO and DO; fT_complete: gm and cgg versus gate voltage to extract the transit frequency (fT) of all the structure TO, tO and DO; IdVg ,IbVg, IgVg, fT (DOs): drain current, bulk curent, gate current, gm and cgg versus gate voltage of the DO structure with shorter gate length; IdVg_tO: drain current versus gate voltage of the tO structure; IdVg_TO: drain current versus gate voltage of the TO structure; IdVd_TO: drain current versus drain voltage of the TO structure. TO, tO, DO, and DOs refers to thick oxide, thin oxide, double oxide and double oxide shorter gate length structure respectively.