基于产线工艺LTPS TFT器件模型和工艺设计套件(PDK)建立与电路设计验证数据集
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本数据集基于LTPS TFT 器件的结构和工作原理,完成了 3-μm 低温多晶硅薄膜晶体管的转移特性曲线的仿真和测试。搭建了基于多晶硅薄膜晶体管的工艺角仿真工具,根据 MOSFET 的工艺角模型,在 LEVEL 62 RPI TFT 模型中提取出 6 个描述工艺误差的工艺角参数,在 TFT 工艺角模型中引入了固定误差、随机误差和补偿误差三部分,设计了面向 LTPS TFT 器件的工艺角仿真模型。完成了基于LTPS TFT的后端设计工具搭建,包括版图单元库和后端验证平台,利用搭建的设计规则检查(DRC) 和 版图原理图对应(LVS) 工具完成了单元库设计规范验证。本数据集共计77MB
This dataset is based on the structure and operating principle of LTPS TFT devices, and completed the simulation and testing of the transfer characteristic curves of 3-μm low-temperature polycrystalline silicon thin-film transistors. We built a process corner simulation tool for polycrystalline silicon thin-film transistors. According to the process corner model of MOSFETs, 6 process corner parameters describing process errors were extracted from the LEVEL 62 RPI TFT model. Three types of errors including fixed error, random error and compensation error were introduced into the TFT process corner model, and a process corner simulation model targeting LTPS TFT devices was designed. We also completed the construction of LTPS TFT-based back-end design tools, including layout cell libraries and back-end verification platforms. The built Design Rule Check (DRC) and Layout Versus Schematic (LVS) tools were used to verify the cell library design specifications. The total size of this dataset is 77 MB.




