背照式工艺及芯片集成工艺检测数据

背照式工艺及芯片集成主要面向晶圆级3D堆叠芯片集成技术的研究，基于长光圆辰键合后的8寸晶圆测试产生，主要记录了3D堆叠对准度、键合有效图像部分孔洞率、键合力和晶圆表面平整度测试指标，数据量10MB。

This dataset focuses on backside-illuminated process and chip integration, which is primarily developed for research on wafer-level 3D stacked chip integration technology. It is generated based on tests conducted on 8-inch wafers after bonding by Changguang Yuanchen, and mainly records the test metrics including 3D stacking alignment accuracy, void ratio in the effective bonding image region, bonding force, and wafer surface flatness. The total data size of the dataset is 10 MB.

搜集汇总

背景与挑战

背景概述

该数据集聚焦于背照式工艺及芯片集成工艺的检测数据，专门用于晶圆级3D堆叠芯片集成技术研究。数据基于键合后的8寸晶圆测试产生，包含3D堆叠对准度、键合有效图像部分孔洞率、键合力和晶圆表面平整度等关键测试指标，总数据量约12.14MB，由长春长光圆辰微电子技术有限公司在国家重点研发计划项目支持下创建。