Development of Advanced Ferroelectric Memory and Applications

This dissertation presents the development and application of back-end-of-line (BEOL) compatible ferroelectric memory technologies, focusing on high-density 3D integration and novel compute-in-memory (CiM) applications. As data continues to grow exponentially, there is a pressing need for memory solutions that are not only high-performing and scalable but also compatible with current manufacturing processes. This work delves into the utilization of Hafnium Zirconium Oxide (HZO) in Metal-Ferroelectric-Metal (MFM) capacitors, addressing key challenges in ferroelectric memory technology such as endurance, reliability, and device miniaturization. Innovative architectures such as the 2 Transistor multiple Capacitor (2TnC) structure have been explored to enhance memory density and operational efficiency. These structures enable quasi-nondestructive readout (QNRO) mechanisms that improve read cycle performance without compromising the write efficiency. Furthermore, the study expands on the integration of these technologies in both 2D and 3D array configurations, showcasing their potential in overcoming the limitations of traditional planar memory solutions. Beyond planar implementations, this dissertation details a vertical 2T-nC FeRAM architecture, experimentally confirming the feasibility of 3D stacking to further boost memory density. Additionally, the feasibility of ferroelectric memory in CiM architectures is demonstrated, highlighting the role of ferroelectric programmable majority gates within neural networks. This integration suggests a promising avenue for reducing the data movement bottleneck prevalent in von Neumann architectures, hence enhancing computational efficiency at reduced power consumption. Oxide-channel ferroelectric thin-film transistors (FeTFTs) are introduced as a novel approach to BEOL-compatible memory. These devices demonstrate both reprogrammable modes and one-time programmability (OTP), opening new opportunities for applications that require combined security and reconfigurability. Finally, an optimized vertical 2TnC FeRAM incorporating a BEOL read transistor is showcased, reinforcing the promise of ferroelectric memory for next-generation, large-scale computing platforms.