VeriThoughts

该数据集是一个独特的大规模、经过正式验证的Verilog推理数据集，包含2万个Verilog寄存器传输级（RTL）代码样本，每个样本都配以提示、生成的Verilog代码、推理轨迹以及功能等价性标签。此外，该数据集还包括在生成过程中使用的推理轨迹，以及指示生成的Verilog代码与原始代码之间功能等价性的标签。该数据集的规模达到2万个样本，其任务是自动化Verilog代码生成和形式验证。

This dataset is a unique large-scale, formally verified Verilog inference dataset, containing 20,000 Verilog Register-Transfer Level (RTL) code samples. Each sample is paired with prompts, generated Verilog code, inference traces, and functional equivalence labels. Additionally, the dataset includes the inference traces utilized during the code generation process, as well as labels that indicate the functional equivalence between the generated Verilog code and the original code. With a total of 20,000 samples, this dataset targets the tasks of automated Verilog code generation and formal verification.