Constant-Time FPGA Implementation of a Gaussian Blur Filter Using a Bit-Serial SIMD Architecture

Name: Constant-Time FPGA Implementation of a Gaussian Blur Filter Using a Bit-Serial SIMD Architecture
Published: 2026-07-30T08:41:45+08:00

Mendeley Data2026-08-05 收录

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资源简介：

HDL source code, testbenches and synthesis results for a bit-serial SIMD Gaussian blur filter implemented on FPGA

创建时间：

2026-07-30