AiEDA/iPCL-R

该数据集是iPCL-R项目的一部分，用于芯片设计中的自动布线模式生成。数据集包含训练集和验证集，具有以下特征：net_name（网络名称）、driver（驱动器）、loads（负载）、tree_seq（树序列）、connected_info（连接信息）、overlap_info（重叠信息）和source_design（源设计）。训练集包含6,347,092个样本，大小为14,242,624,501字节；验证集包含10,163个样本，大小为24,439,501字节。数据集总大小为14,267,064,002字节，下载大小为3,468,684,189字节。该数据集用于预训练芯片布局布线的基础模型，支持空间推理任务和路由模式生成。

This dataset is part of the iPCL-R project, designed for automated routing pattern generation in chip design. The dataset includes training and validation splits with the following features: net_name, driver, loads, tree_seq, connected_info, overlap_info, and source_design. The training set contains 6,347,092 examples with a size of 14,242,624,501 bytes, while the validation set contains 10,163 examples with a size of 24,439,501 bytes. The total dataset size is 14,267,064,002 bytes, with a download size of 3,468,684,189 bytes. The dataset is used for pre-training a foundation model for chip layout routing, supporting spatial reasoning tasks and routing pattern generation.