低导通电阻SiC MOSFET直流特性

为了研究低导通电阻碳化硅MOSFET芯片，并优化设计和关键制造工艺，本部分从从芯片元胞结构设计，自对准短沟道工艺，高沟道迁移率栅氧技术等方面降低芯片比导通电阻，完成了1200V SiCMOSFET芯片设计及关键制造工艺的优化，采用自对准短沟道工艺结合JFET区掺杂工艺将器件比导通电阻从立项初期的5.8mΩ·cm2降低到4.2mΩ·cm2，已达到项目指标要求的小于5mΩ·cm2，实现1200V低导通电阻MOSFET芯片。主要记录了考核要求中的阻断电压，导通电阻，比导通电阻，阈值电压等观测值。

To study low-specific on-resistance silicon carbide (SiC) MOSFET chips and optimize their design and key manufacturing processes, this work reduces the specific on-resistance of the chips through multiple approaches including chip cell structure design, self-aligned short-channel process, and high-channel-mobility gate oxide technology. The design of 1200V SiC MOSFET chips and the optimization of their key manufacturing processes have been completed. By adopting the self-aligned short-channel process combined with the JFET region doping process, the specific on-resistance of the device has been reduced from 5.8 mΩ·cm² at the initial stage of the project to 4.2 mΩ·cm², which meets the project's requirement of less than 5 mΩ·cm², thus realizing the 1200V low-specific on-resistance SiC MOSFET chips. This dataset mainly records the observed values such as breakdown voltage, on-resistance, specific on-resistance, and threshold voltage specified in the assessment requirements.

搜集汇总

背景与挑战

背景概述

该数据集记录了1200V SiC MOSFET芯片的直流特性参数，包括阻断电压、导通电阻、比导通电阻和阈值电压等观测值，用于优化芯片设计和关键制造工艺，属于国家重点研发计划项目的一部分。