Systolic Array-based Accelerator DataSet (SA-DS)

SA-DS是由新泽西理工学院电气与计算机工程系创建的数据集，专注于深度神经网络硬件加速器的设计。该数据集包含1536个基于Gemmini加速器生成器模板的空间阵列设计，每个设计都配有微架构的口头描述和Chisel语言的描述。SA-DS的创建旨在支持大型语言模型在硬件加速器设计中的应用，解决硬件描述语言数据集的不足。数据集通过详细的配置和功能单元，支持多种应用场景，如训练卷积、最大池化和非线性激活等，旨在优化硬件设计的效率和性能。

SA-DS is a dataset developed by the Department of Electrical and Computer Engineering at the New Jersey Institute of Technology, focusing on the design of deep neural network hardware accelerators. This dataset includes 1536 spatial array designs based on the Gemmini accelerator generator template, with each design paired with both a verbal description of its microarchitecture and a specification written in the Chisel hardware description language. The creation of SA-DS aims to support the application of large language models in hardware accelerator design, addressing the shortcomings of existing hardware description language datasets. Supported by detailed configurations and functional units, the dataset covers multiple application scenarios such as convolutional training, max pooling and non-linear activation, with the goal of optimizing the efficiency and performance of hardware designs.