High performance implementations of the 2D Ising model on GPUs

We present and make available novel implementations of the two-dimensional Ising model that is used as a benchmark to show the computational capabilities of modern Graphic Processing Units (GPUs). The rich programming environment now available on GPUs and flexible hardware capabilities allowed us to quickly experiment with several implementation ideas: a simple stencil-based algorithm, recasting the stencil operations into matrix multiplies to take advantage of Tensor Cores available on NVIDIA GPUs, and a highly optimized multi-spin coding approach. Using the managed memory API available in CUDA allows for simple and efficient distribution of these implementations across a multi-GPU NVIDIA DGX-2 server. We show that even a basic GPU implementation can outperform current results published on TPUs (Yang et al., 2019) and that the optimized multi-GPU implementation can simulate very large lattices faster than custom FPGA solutions (Ortega-Zamorano et al., 2016).

本报告呈现并公开了二维伊辛模型的创新实现方案，该方案作为基准用于展示现代图形处理单元（GPU）的计算能力。GPU上丰富的编程环境及其灵活的硬件能力使我们能够迅速尝试多种实现构想：一种基于简单模板的算法、将模板操作重构成矩阵乘法以利用NVIDIA GPU上的张量核心，以及一种高度优化的多自旋编码方法。通过CUDA中可用的托管内存API，我们可以轻松高效地将这些实现方案部署在多GPU的NVIDIA DGX-2服务器上。我们展示了即使是最基础的GPU实现也能够超越已发表在TPU上的当前结果（Yang等，2019年），并且经过优化的多GPU实现能够比定制的FPGA解决方案更快地模拟非常大的晶格（Ortega-Zamorano等，2016年）。