Prototype MR Damper Characterization Tests Using Step Input
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https://www.designsafe-ci.org/data/browser/public/nees.public/NEES-2012-1158.groups/Experiment-4
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资源简介:
Triangle input to the actuator (3 cycles) and step input to the damper at the beginning of the second complete cycle. The first number in the test is the type of step used and the second is the velocity of the triangle wave.
Twelve trials are conducted to provide data intended for MR damper characterization and modeling. The two inputs to the MR Damper are the displacement and the voltage, and the output is the measured force. In each trial 3 cycles of a triangle displacement input to the MR damper using a hydraulic actuator. The actuator command is a step input. ‘Step’ indicates an increase in voltage; ‘drop’ indicates a decrease in voltage. The file for each trial contains displacement input and voltage input, and force output.
Channels included in unprocessed data files:
1) Main Displacement Measurement (D1)
2) Force (F)
3) Acceleration of Actuator (A)
4) Command to Actuator (U)
5) Voltage to MR Damper Circuit (Y)
6) Second Displacement measurement (D2)
Channels included in converted data files:
1) Damper Displacement (D)
2) Force (F)
3) Acceleration of Actuator (A)
4) Voltage to MR Damper Circuit (Y)
5) Calculated velocity of MR damper (V)
For the step inputs, the code used in the filename has the following corresponding frequencies:
Step type:
1) 0-1 V
2) 0-2.25 V
3) 1-2.25 V
Velocities:
1) 1 Hz => 2 in/sec
2) 2.5 Hz => 5 in/sec
3) 5 Hz => 10 in/sec
For more detailed description, see step_signal_description.csv in the Documentation.
The unit of input and output data in the unprocessed data files is Volts.
The unit of input and output data in the converted data files is N and cm.
The converted data are obtained from the unprocessed data.
These data sets were taken using a custom data acquisition system. The data acquisition system employed consisted of eight Syminex XFM82 3-decade programmable antialiasing filters having a 90 dB signal to noise ratio and simultaneous sample and hold, an Analogic LSDAS-16-AC-mod2 data acquisition board having 16 bit A/D converters, an Analogic CTRTM-05 counter-timer board, a Gateway 2000 P5-90 computer, and the HEM Data Corporation Snap-Master software. The sampling frequency is 3004.8 Hz and all channels are filtered at 1500 Hz using the programmable anti-aliasing filters
提供机构:
Network for Earthquake Engineering Simulation (NEES)
创建时间:
2015-06-10



