40k C synthesizable programs

本研究构建了一个包含40,000个可综合C程序的标准基准数据集，旨在加速硬件开发中的电路质量评估。数据集包括合成程序和三个真实世界的HLS基准测试集，每个程序均在FPGA上实现以生成实际性能指标。数据集的创建过程涉及将C/C++程序转换为图表示，并利用图神经网络进行性能预测。该数据集主要应用于解决硬件设计中早期阶段的性能预测问题，通过快速准确地评估电路设计质量，支持敏捷硬件开发和优化迭代。

This study constructs a standard benchmark dataset containing 40,000 synthesizable C programs, aiming to accelerate circuit quality evaluation in hardware development. The dataset includes synthesized programs and three real-world HLS benchmark suites, where each program is implemented on an FPGA to generate actual performance metrics. The creation process of this dataset involves converting C/C++ programs into graph representations, and leveraging graph neural networks for performance prediction. This dataset is mainly used to solve performance prediction problems in the early phase of hardware design, enabling rapid and accurate assessment of circuit design quality to support agile hardware development and optimized iterations.