Power leakage traces of SMAesH

This dataset contains measurements of the power consumption of a device encrypting data with the AES cipher. The device is a Field Programmable Gate Array (FPGA) programmed with the SIMPLE-Crypto Masked AES in Hardware (SMAesH) IP (archived version). This implementation of AES is protected from side-channel leakage with the Hadware Private Circuits (HPC) masking scheme. In this dataset, SMAesH v1 is instantiated at the first order (two shares) and implemented on Xilinx's Artix-7 and a Spartan-6 FPGAs. The leakage trace cover the first round of the execution of AES. The dataset also contains the values of the key shares, plaintext shares and pseudo-randomness generator (PRG) seed for each trace. See the detailed documentation and example usage (archived version of these resources ).