General Bi-tri Logic SPWM for Current Source Converter with Optimized Zero-state Replacement

This paper proposed an optimized zero-state replacement (ZSR) method for general Bi-tri logic SPWM (BTSPWM) to deal with the common-mode voltage (CMV) issue. The BTSPWM can take advantage of the well-developed modulation strategies adopted in voltage source converters (VSCs) and transfer them into a current source converter (CSC) system through logic translation, which shares more general features compared with other modulations developed for CSC. However, all-off gating signals can be generated through the logic translation, which should be replaced with the redundant zero-states to avoid open-circuit. Most of the ZSR strategies are focused on switching time minimization while not considering the CMV excited by the replaced zero-states. To address the CMV issue, an optimized ZSR method for general BTSPWM was proposed to suppress the CMV while not influence the pulse width modulation (PWM) features. Not only the CMV peak value but also the third-order component can be effectively reduced. Moreover, the proposed method can be easily applied to a parallel CSC system due to the inherent modularity. The validity of the proposed methods was verified on both single and parallel CSC systems.