nieche/DL-Architectural-DAGs-2026

DL Architectural DAGs — HPC Features是一个研究数据集，包含从200多个深度学习模型中提取的计算图（有向无环图，DAGs），这些图通过torch.export工具生成，并为每个节点标注了硬件性能计数器（HPC）代理特征。该数据集旨在支持研究异构硬件（如CPU、GPU、加速器）上深度神经网络工作负载的操作符调度、内存映射和性能预测。数据集平均并行度为2.19。它提供了两种分割：models分割包含每个模型的元数据和聚合统计信息，nodes分割包含每个图节点（即操作）的HPC特征，如FLOPs、内存字节和传输字节。覆盖的模型库包括timm、torchvision和HuggingFace Transformers，涵盖多种架构如ResNet、ViT、BERT等。FLOPs估计基于标准公式，适用于矩阵乘法、卷积、注意力等操作。数据集可用于分析和优化深度学习模型的硬件性能。DL Architectural DAGs — HPC Features is a research dataset consisting of computational directed acyclic graphs (DAGs) extracted from over 200 deep learning models. These graphs are generated using the torch.export tool, and each node is annotated with hardware performance counter (HPC) proxy features. This dataset aims to support research on operator scheduling, memory mapping, and performance prediction of deep neural network workloads on heterogeneous hardware such as CPUs, GPUs, and accelerators. The average parallelism of the dataset is 2.19. It provides two data splits: the models split contains metadata and aggregated statistical information for each model, while the nodes split includes HPC features for each graph node (i.e., operator), such as FLOPs, memory bytes, and transferred bytes. The covered model libraries include timm, torchvision, and HuggingFace Transformers, covering a variety of architectures such as ResNet, ViT, BERT, and others. FLOPs estimates are based on standard formulas applicable to operations like matrix multiplication, convolution, and attention. This dataset can be used to analyze and optimize the hardware performance of deep learning models.