TSMC 22nm片上工艺、温度和老化效应检测电路设计与测试数据

本数据集基于TSMC 22nm先进工艺节点构建，是片上工艺、温度及老化检测电路的流片级验证基准数据集，为集成电路可靠性设计、温度感知及老化预警提供标准参考资源。数据集核心包含三类关键电路：基于自定时振荡环的工艺检测电路、高线性度温度检测电路、支持全生命周期老化效应量化评估的老化检测电路。数据结构遵循工业界数模混合设计流程，涵盖四类关键设计视图与验证数据：CDL网表文件（版图与原理图一致性检查）、GDSII版图文件（物理实现）、SPICE网表及测试平台文件与仿真数据（.mt0）、Cadence Spectre仿真配置文件（.scs）及仿真数据（.csv）。数据集面向高性能处理器设计与高可靠性集成电路研发领域，支持Linux环境下主流EDA工具调用，助力研究人员探索片上偏差校准机制与老化补偿策略，为消除设计余量、提升芯片能效及可靠性提供高价值IP核支撑，已作为重点研发计划项目成果核心组成部分规范化汇交管理。

This dataset is built based on the TSMC 22nm advanced process node, serving as a tapeout-level verification benchmark dataset for on-chip process, temperature, and aging detection circuits, and providing a standard reference resource for integrated circuit (IC) reliability design, temperature-aware design, and aging early warning. The core of the dataset includes three types of key circuits: process detection circuits based on self-timed oscillator rings, high-linearity temperature detection circuits, and aging detection circuits that support quantitative evaluation of aging effects across the full lifecycle. The dataset's structure adheres to the industrial mixed-signal design workflow, encompassing four key design views and verification datasets: CDL netlist files (for layout-versus-schematic (LVS) verification), GDSII layout files (for physical implementation), SPICE netlists, testbench files and their corresponding simulation data (.mt0), as well as Cadence Spectre simulation configuration files (.scs) and their corresponding simulation data (.csv). This dataset is targeted at the domains of high-performance processor design and high-reliability integrated circuit research and development, supports invocation by mainstream EDA tools in the Linux environment, and enables researchers to explore on-chip variation calibration mechanisms and aging compensation strategies. It provides high-value IP core support for reducing design margins, enhancing chip energy efficiency and reliability, and has been formally submitted and managed as a core component of the achievements of key R&D projects.

搜集汇总

背景与挑战

背景概述

该数据集基于TSMC 22nm先进工艺节点，提供了片上工艺、温度和老化效应检测电路的设计与测试数据，包含三类关键电路：工艺检测电路、温度检测电路和老化检测电路。数据集遵循工业界数模混合设计流程，涵盖CDL网表、GDSII版图、SPICE仿真等多种文件格式，支持集成电路可靠性设计和老化补偿策略研究，是高性能处理器与高可靠性芯片研发的重要参考资源。