CA-Intel Performance Evaluation Raw Data
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https://ieee-dataport.org/documents/ca-intel-performance-evaluation-raw-data
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In the conducted experiments using the ns-3 simulator, the performance of the Collision-Aware-Intel (CA-Intel) algorithm was evaluated under varying conditions to simulate different causes of frame errors. Key data points include: 1. Number of Clients (Transmitters): The number of clients varied between 1 and 6 to create different levels of network congestion and induce collisions. For a single client, errors were primarily attributed to poor SNR. As the number of clients increased, collision-induced errors became more prevalent. 2. Transmit Power: The transmission power was varied across six levels, from +10 dBm to -10 dBm. At 10 dBm, frame errors were primarily caused by collisions due to the high signal strength. In contrast, at lower power levels, errors were primarily caused by poor SNR, and a combination of both factors was observed in intermediate cases. 3. Traffic Configuration: Up-link UDP traffic was used for transmission testing, with a frame size of 1000 bytes and a frame interval of 10 µs. The experiments also incorporated A-MPDU frame aggregation, which allowed multiple frames to be transmitted in a single burst to enhance throughput and MAC efficiency.
提供机构:
Wang, Luhan



