[Artifact] Deductive Verification Techniques for Embedded Systems

This is the artifact for the doctoral thesis <em>Deductive Verification Techniques for Embedded Systems</em>. It contains case study data for the experiments described in the thesis, from the raw case studies over intermediate encodings to the final PVL program that was verified with VerCors to give the verification times reported in the thesis. More details can be found in the included README.