Characterization Data for external FPGA memories DDR4 and HBM2 with High Level Synthesis
收藏DataCite Commons2020-12-15 更新2025-04-16 收录
下载链接：
https://ieee-dataport.org/documents/characterization-data-external-fpga-memories-ddr4-and-hbm2-high-level-synthesis
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资源简介：
This repository includes the data collected from the aocl profile and the Jupyter notebooks with the memory model equations proposed. Application folder contains a set of benchmarks to validate the proposed model.The model was developed using the Quartus aocl version 18.1 for Stratix10 GX and 19.4 for Stratix10MX
提供机构：
IEEE DataPort
创建时间：
2020-12-15
