An efficient and portable SIMD algorithm for charge/current deposition in Particle-In-Cell codes

In current computer architectures, data movement (from die to network) is by far the most energy consuming part of an algorithm (≈20pJ/word on-die to ≈10,000 pJ/word on the network). To increase memory locality at the hardware level and reduce energy consumption related to data movement, future exascale computers tend to use many-core processors on each compute nodes that will have a reduced clock speed to allow for efficient cooling. To compensate for frequency decrease, machine vendors are making use of long SIMD instruction registers that are able to process multiple data with one arithmetic operator in one clock cycle. SIMD register length is expected to double every four years. As a consequence, Particle-In-Cell (PIC) codes will have to achieve good vectorization to fully take advantage of these upcoming architectures. In this paper, we present a new algorithm that allows for efficient and portable SIMD vectorization of current/charge deposition routines that are, along with the field gathering routines, among the most time consuming parts of the PIC algorithm. Our new algorithm uses a particular data structure that takes into account memory alignement constraints and avoids gather/scatter instructions that can significantly affect vectorization performances on current CPUs. The new algorithm was successfully implemented in the 3D skeleton PIC code PICSAR and tested on Haswell Xeon processors (AVX2-256 bits wide data registers). Results show a factor of ×2 to ×2.5 speed-up in double precision for particle shape factor of order 1–3. The new algorithm can be applied as is on future KNL (Knights Landing) architectures that will include AVX-512 instruction sets with 512 bits register lengths (8 doubles/16 singles).在当前的计算机架构中，数据移动（从芯片裸片到网络）是算法中能耗最高的环节——片上数据移动能耗约为20皮焦耳/字，而网络间数据移动能耗可达约10000皮焦耳/字。为在硬件层面提升内存局部性并降低数据移动相关的能耗，未来的百亿亿次级计算机倾向于在每个计算节点上采用众核处理器，这类处理器会降低时钟频率以实现高效散热。为弥补频率降低带来的性能损失，计算机厂商开始采用长单指令多数据（Single Instruction Multiple Data, SIMD）指令寄存器，这类寄存器可在一个时钟周期内通过单个算术运算算子处理多组数据。预计SIMD寄存器的长度每四年就会翻倍。因此，粒子网格（Particle-In-Cell, PIC）算法必须实现高效的向量化，才能充分利用这类即将到来的架构特性。本文提出了一种全新的算法，可实现电流/电荷沉积（current/charge deposition）流程的高效且可移植的SIMD向量化；而该流程与场收集（field gathering）流程同属PIC算法中耗时占比最高的环节之一。我们提出的新算法采用了一种特殊的数据结构，该结构兼顾了内存对齐约束，同时规避了会显著影响当前CPU向量化性能的聚集（gather）/分散（scatter）指令。该新算法已成功在三维框架PIC代码PICSAR中实现，并在搭载AVX2指令集与256位宽数据寄存器的Haswell架构至强（Xeon）处理器上完成了测试。测试结果显示，在粒子形状因子阶数为1至3的场景下，双精度模式下的加速比可达2倍至2.5倍。该新算法可直接应用于未来的KNL（Knights Landing）架构，这类架构将搭载512位寄存器长度的AVX-512指令集，可同时处理8个双精度数据或16个单精度数据。