Dataset for: Effective Logic Synthesis Flow for Threshold Logic Circuit Design

This dataset comprises all the necessary data to reproduce the obtained results presented in the manuscript entitled "Effective Logic Synthesis Flow for Threshold Logic Circuit Design".本数据集包含复现题为《面向阈值逻辑电路设计的高效逻辑综合流程》的研究手稿中所得结果所需的全部必要数据。