Prototype of Front End Electronics based on FPGA-ADC for TOF PET detector applications

The FPGA-ADC system was measured separately in two modes. In non-coincidence mode, the ramp-like waveform is input into the FPGA by the signal generator and collected through FPGA-ADC. These data will be used for calibration of FPGA-ADC. Single channel FPGA-ADC performs full waveform sampling. Charge integration will be performed after calibration. Energy resolution can be obtained through the energy spectrum of this system. Under the coincidence mode, the same ramp-like waveform is collected. The two channel FPGA-ADC system performs windowing and full waveform sampling. Energy resolution follows the same processing method as above. The system time resolution can be obtained by setting the rising edge threshold of the waveform and interpolating it. The development board used in the experiment is KC705, and the tool for analyzing is Matlab.