Robust Complementary Logic Using Multi-Gate N/MEMS Relays Data

This dataset contains the data used to create figures for the manuscript Robust Complementary Logic Using Multi-Gate N/MEMS Relays.  This paper presents novel complementary logic gate structures and discusses failure modes and optimization methods for these devices.  A detailed comparison of metallization schemes and operational modes is included as well.  In this dataset, information used to generate figure 2 (a, b), 4, 5 (a), and 6 are contained herein.  Figure 2 show cases the change in response time with variations in handle layer voltage.  Figure 4 presents relay lifetimes with varying metallization schemes.  Figures 5 and 6 show the output data of these gates under normal and modified operation respectively.