Correction of OES Signal Based on Viewport Contamination Levels in HARC Etch Process

Recent semiconductor devices have embraced structural modifications, including vertical stacking, to overcome the limitations of miniaturization. Particularly, memory devices have seen improvements through the transition to 3D stack structures. To address the challenges of etching high aspect ratio contact holes, the Bosch process, which alternates between deposition of a passivation layer on the pattern wall to prevent sidewall etching and etching steps, has been utilized. This method commonly employs SF6 and CxFy gases with an addition of O2 to form patterns with very high aspect ratios. However, as throughput increases, the passivation layer affects not only the pattern walls but also chamber parts (e.g., chamber wall, view port, etc.). Notably, contaminated view ports can lead to a decrease in intensity during Optical Emission Spectroscopy (OES) diagnostics as throughput increases, a problem attributed to CF polymer contamination of the viewport. This contamination complicates plasma diagnostics by making it difficult to measure plasma parameters consistently. To address this issue, our study used a 6-inch ICP etcher with view ports at various deposition levels to observe the attenuation of signals as throughput increased. Moreover, by utilizing view ports with an additional amorphous carbon layer (ACL), we were able to compensate for signal reduction due to viewport contamination. This allowed us to distinguish between drifts caused by plasma parameter drift and viewport contamination. The corrected signals were then used for Virtual Monitoring (VM), enabling more sophisticated process control. Our findings provide essential data for developing a model that facilitates refined process control. This research was supported by the MOTIE(Ministry of Trade, Industry & Energy (1415188246) and KSRC(Korea Semiconductor Research Consortium) (20022492) support program for the development of the future semiconductor device.

近期，半导体器件领域采纳了结构性的改良，包括垂直堆叠技术，以克服微型化所带来的局限。特别是，通过向三维堆叠结构的过渡，存储器件的性能得到了显著提升。为了解决刻蚀高纵横比接触孔的挑战，Bosch工艺被广泛应用，该工艺通过在图案壁上交替沉积钝化层以防止侧壁腐蚀和刻蚀步骤。此方法通常采用SF6和CxFy气体，并添加O2以形成具有极高纵横比的图案。然而，随着通量的增加，钝化层不仅影响图案壁，还影响室体部件（例如室壁、观察窗口等）。值得注意的是，污染的观察窗口在通量增加时会导致光学发射光谱（OES）诊断中的强度下降，这一问题归因于观察窗口的CF聚合物污染。这种污染使得等离子体诊断复杂化，难以持续测量等离子体参数。为了解决这一问题，我们的研究采用了一台6英寸的ICP刻蚀机，该刻蚀机具有不同沉积层的观察窗口，以观察随着通量增加信号衰减的情况。此外，通过使用附加非晶碳层（ACL）的观察窗口，我们能够补偿由于观察窗口污染导致的信号减少。这使我们能够区分由等离子体参数漂移和观察窗口污染引起的漂移。校正后的信号随后用于虚拟监控（VM），从而实现更复杂的工艺控制。我们的发现为开发促进精细工艺控制的模型提供了必要的数据。本研究得到了韩国贸易、工业和能源部（MOTIE，1415188246）和韩国半导体研究协会（KSRC，20022492）支持的未来半导体器件开发项目的支持。