Data and code underlying the research of: Reference in array logic

This focuses on maximizing the throughput and energy efficiency while performing multi-operand (N)OR and (N)AND operations. This paper proposes a referencing-in-array scheme with a differential voltage-based sensing technique that enables accurate two and multi-operand logic operations for RRAM-based CIM architecture. The scheme makes use of a 2T2R cell configuration to create a complementary bitcell structure that inherently acts also as a reference during the operation execution resulting in a high sensing margin. Moreover, the variation-sensitive multi-operand (N)AND operation is implemented using complementary-input (N)OR operation to further improve its accuracy. This dataset includes schematic netlist files, raw data on the Excel sheets for latency and power estimations/simulation results, and Matlab codes for generating the graphs and figures in the associated publication.本研究旨在开展多操作数或非（NOR）与与非（NAND）逻辑运算，同时最大化系统吞吐量与能源利用效率。本文提出一种搭载基于差分电压传感技术的阵列内参考方案，可针对基于阻变随机存取存储器（Resistive Random Access Memory, RRAM）的计算内存（Compute-In-Memory, CIM）架构实现精准的双操作数及多操作数逻辑运算。该方案采用2管2阻单元（2T2R cell）配置构建互补位单元结构，该结构在运算执行过程中可天然充当参考源，从而实现较高的传感裕度。此外，针对易受工艺波动影响的多操作数与非（NAND）运算，本方案通过互补输入或非（NOR）运算实现，进一步提升了运算精度。本数据集包含原理图网表文件、用于延时与功耗评估/仿真结果的Excel原始数据，以及用于生成相关发表论文中图表的Matlab代码。