Simulink and VHDL files of complex cube root

In this work, a fast algorithm from the perspective of hardware execution is presented for the complex cube rootcomputation. In the algorithm which is based on the Laurent series of ∛z function, the z-plane’s numbers are first mapped with arapid scaling and rotation operation to a pre-specified limited region, and then after computing the sequences of the series areverse mapping operation is applied. The parameters of the algorithm are analyzed thoroughly to be selected properly to achievebetter precision. The algorithm has been designed and implemented on an FPGA-based platform by using the Simulink HDLCoder tool and Xilinx ISE 14.7, and for the implementation of each step of the algorithm the resource usage and speed parametersare considered carefully. The implemented hardware, though with the capability of computing complex cube root, has well andcomparable specifications compared to those of previous implementations of real cube root calculation on FPGA.