Dataset for "Hardware-Efficient Node Processing Unit Architectures for Flexible LDPC Decoder Implementations"
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下载链接：
https://eprints.soton.ac.uk/id/eprint/415642
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资源简介：
Comparison of fixed-point CNPUs constructed using the proposed novel Dual-tree topology vs. three alternatives, for a range of input numbers I, measuring hardware resource requirements and maximum operating frequency.
The dataset is associated with the following publication:
P. Hailes, L. Xu, R. G. Maunder, B. M. Al-Hashimi, and L. Hanzo, “Hardware-Efficient Node Processing Unit Architectures for Flexible LDPC Decoder Implementations,” IEEE Trans. Circuits Syst. II Express Briefs, 2018.
提供机构：
University of Southampton
创建时间：
2018-02-13
