FPGA Implementation of an Adaptive Sweep Algorithm for Spacecraft Radios
收藏Mendeley Data2024-01-31 更新2024-06-30 收录
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http://dataverse.jpl.nasa.gov/citation?persistentId=doi:10.48577/jpl.roxzclta
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Spacecraft communicate with the Deep Space Network (DSN) at a predetermined carrier frequency. However,signals are Doppler shifted away from the original transmittedfrequency due to the high orbital velocities of the spacecraft.This paper describes the implementation of an adaptive sweepalgorithm on a Xilinx Kintex-7 field-programmable gate array(FPGA). This algorithm estimates the carrier Doppler shift andcompensates for it to allow for coherent data demodulation. Thealgorithm is implemented in MATLAB’s Simulink, compliedto Verilog using HDL Coder, and run on the FPGA using theFPGA-in-the-loop Wizard. The FPGA implementation has beenvalidated in the presence of noise, by comparing the standarddeviation of the Doppler residuals at different signal-to-noiseratios, to values obtained via a theoretical analysis of the carriersynchronization loop. Results indicate excellent agreement andthus validate our implementation. We have also tested thealgorithm against flight data obtained from the Lunar Reconnaissance Orbiter (LRO) and the Deep Space Network (DSN),and proven that the algorithm can successfully acquire andtrack the carrier.
航天器以预设载波频率与深空网络(Deep Space Network, DSN)进行通信。然而,由于航天器极高的轨道运动速度,信号会产生多普勒频移,偏离原始发射载波频率。本文阐述了一种在赛灵思Kintex-7现场可编程门阵列(Field-Programmable Gate Array, FPGA)上实现的自适应扫频算法,该算法可估算载波多普勒频移并进行补偿,以支持相干数据解调。本算法基于MATLAB Simulink平台实现,通过HDL Coder编译为Verilog硬件描述语言,并借助FPGA在环向导(FPGA-in-the-Loop Wizard)在FPGA上运行。研究团队通过在不同信噪比下对比多普勒残差的标准差与载波同步环路理论分析所得的数值,在含噪声的环境中验证了该FPGA实现方案的有效性。结果显示二者吻合度极佳,从而验证了本实现的正确性。此外,团队还基于月球勘测轨道飞行器(Lunar Reconnaissance Orbiter, LRO)与深空网络获取的飞行数据对该算法进行了测试,证实其可成功捕获并跟踪载波。
创建时间:
2024-01-31



