UTH FPGA Telemetry Dataset for ML Inference Experiments on AMD/Xilinx ZCU102 MPSoC Development Board

📌 Overview This dataset contains telemetry traces from repeated machine learning inference experiments executed on a Xilinx ZCU102 FPGA platform.Each experiment corresponds to a specific DPU bitstream configuration (DPU size and number of DPU compute units), a model variant (including pruning variants), and a system workload mode applied on the ARM CPU. The dataset is intended to support research on: FPGA-based ML inference performance, DPU scaling and configuration trade-offs, interaction between FPGA accelerators and ARM CPU workloads, power, memory bandwidth, and system-level telemetry analysis. Each experiment produces a time-series telemetry trace recorded during a batch inference run. 📂 Dataset Structure The dataset is organized into two main components: experiments.csv — index fileOne row per experiment run, describing its configuration. data/<experiment_id>.csv — telemetry traceTime-series telemetry recorded during the corresponding experiment. 🗂️ experiments.csv — Index File experiments.csv is the entry point to the dataset.Each row describes one complete experiment run on the FPGA. Format Experiment ID,DPU CU#,DPU Size,Model,Workload Mode Index Columns Column Description Experiment ID Unique identifier for the experiment run. Used to locate the trace at data/<experiment_id>.csv. DPU CU# Number of DPU compute units (parallel inference threads). DPU Size DPU configuration size. The dataset includes 8 sizes and 26 total configurations when combined with CU counts. Model Model executed during the experiment. Pruning variants are encoded in the name (e.g., resnet18-25 for 25% pruning). Workload Mode Background workload on the ARM CPU: None, C-H (compute-bound), or M-H (memory-bound). 🧪 Experiments Overview Aspect Description Hardware platform Xilinx ZCU102 MPSoC Development Board DPU configurations 26 total (8 DPU sizes × multiple CU counts) Models 12 models with pruning variants (-25, -50, or none) Run duration From seconds up to ~10 minutes Execution mode Batch inference Each row in experiments.csv corresponds to one full experiment run on the development board. 📈 Telemetry Traces — data/<experiment_id>.csv Each telemetry file contains a time series of system and inference measurements recorded during the experiment. Time Columns Column Description timestamp Unix timestamp (seconds, fractional) when the telemetry row was recorded. timestamp_human Human-readable timestamp of the same moment. These represent the actual time at which telemetry was sampled. Per-Thread Performance Columns (*_K) Many columns are indexed by K, representing per-DPU compute unit (per inference thread) measurements.K ranges from 1 to DPU CU#. Column Pattern Description preprocessing_time_K Preprocessing latency for inference thread K. inference_time_K Inference latency for thread K. postprocessing_time_K Postprocessing latency for thread K. job_id_K Identifier of the inference job executed on thread K. fps_K Frames-per-second observed for thread K. Memory Bandwidth Telemetry (ZCU102 Ports) Column Description S0_read … S4_read Read bandwidth for memory ports 0–4. S0_write … S4_write Write bandwidth for memory ports 0–4. Power Telemetry Column Description arm_power Instantaneous power consumption of the ARM CPU subsystem. fpga_power Instantaneous power consumption of the FPGA fabric. CPU Utilization (ARM Cortex-A53) Column Description cpu_0, cpu_1, cpu_2, cpu_3 Utilization of the four ARM Cortex-A53 cores. Memory Metrics Column Description memory_available Available system memory at sampling time. memory_total Total system memory. swap_free Free swap space. Experiment Linkage Column Description experiment_id Experiment identifier matching the filename and the index in experiments.csv. 🚀 How to Use the Dataset Select an experiment from experiments.csv based on: DPU configuration (DPU Size, DPU CU#) model variant (Model) workload mode (Workload Mode) Open the corresponding telemetry trace: data/<experiment_id>.csv Analyze: inference latency breakdown (pre / infer / post), per-thread throughput (fps_K), memory bandwidth usage (S*_read, S*_write), CPU utilization and power behavior under different workloads. 🎯 Intended Use This dataset is intended for: FPGA performance analysis, ML inference benchmarking, system-level telemetry studies, research on accelerator–CPU interaction. It represents a controlled experimental environment, not a production deployment. 🤝 Acknowledgements & Funding This work is part of the MLSysOps project and is funded by the European Union’s Horizon Europe research and innovation programme under grant agreement No. 101092912. More information: https://mlsysops.eu/📌 数据集概览 本数据集包含在Xilinx ZCU102现场可编程门阵列（FPGA）平台上重复开展的机器学习（Machine Learning, ML）推理实验所产生的遥测轨迹。每项实验对应特定的深度学习处理单元（DPU）比特流配置（含DPU尺寸与DPU计算单元数量）、模型变体（含剪枝变体）以及运行在ARM CPU上的系统工作负载模式。 本数据集可支撑以下方向的研究： - 基于FPGA的ML推理性能分析 - DPU扩展性与配置权衡 - FPGA加速器与ARM CPU工作负载间的交互 - 功耗、内存带宽以及系统级遥测分析 每项实验会生成批量推理运行期间采集的时序遥测轨迹。 📂 数据集结构 本数据集分为两大核心组成部分： 1. `experiments.csv` — 索引文件 每行对应一次实验运行，描述其配置参数。 2. `data/<experiment_id>.csv` — 遥测轨迹文件 记录对应实验期间采集的时序遥测数据。 🗂️ `experiments.csv` — 索引文件 `experiments.csv`是本数据集的入口文件，每行描述一次在FPGA平台上完成的完整实验运行。 ### 文件格式 csv Experiment ID,DPU CU#,DPU Size,Model,Workload Mode ### 索引字段说明 | 字段名 | 说明 | |----------------------|----------------------------------------------------------------------| | Experiment ID | 实验运行的唯一标识符，用于定位`data/<experiment_id>.csv`格式的轨迹文件 | | DPU CU# | DPU计算单元数量，即并行推理线程的总数 | | DPU Size | DPU配置的尺寸规格，本数据集共包含8种尺寸，结合计算单元数量后总计26种配置 | | Model | 实验中执行的模型，剪枝变体通过名称后缀编码（例如`resnet18-25`代表剪枝率25%的ResNet-18模型） | | Workload Mode | ARM CPU上运行的后台工作负载：`None`（无额外负载）、`C-H`（计算密集型）或`M-H`（内存密集型） | 🧪 实验概览 | 维度 | 说明 | |--------------|----------------------------------------------------------------------| | 硬件平台 | Xilinx ZCU102多处理器系统芯片（MPSoC）开发板 | | DPU配置总数 | 总计26种（8种DPU尺寸 × 多种计算单元数量组合） | | 模型数量 | 12种模型，包含剪枝变体（-25、-50或无剪枝） | | 运行时长 | 从数秒至约10分钟不等 | | 执行模式 | 批量推理 | `experiments.csv`中的每行均对应开发板上的一次完整实验运行。 📈 遥测轨迹 — `data/<experiment_id>.csv` 每份遥测文件包含实验期间采集的系统与推理测量值的时序序列。 #### 时间戳字段 | 字段名 | 说明 | |--------------------|----------------------------------------------------------------------| | timestamp | Unix时间戳（单位：秒，含小数部分），代表遥测行的采集时刻 | | timestamp_human | 同一时刻的人类可读格式时间戳 | 二者均代表遥测数据的实际采样时刻。 #### 单线程性能字段（带`_K`后缀） 多个列通过后缀`K`进行索引，代表每个DPU计算单元（即每个推理线程）的测量值，`K`的取值范围为1至DPU计算单元总数。 | 列名模式 | 说明 | |------------------------|----------------------------------------------------------------------| | `preprocessing_time_K` | 推理线程`K`的预处理延迟 | | `inference_time_K` | 推理线程`K`的推理延迟 | | `postprocessing_time_K`| 推理线程`K`的后处理延迟 | | `job_id_K` | 推理线程`K`上执行的推理任务标识符 | | `fps_K` | 推理线程`K`观测到的每秒帧率（FPS） | #### 内存带宽遥测（ZCU102内存端口） | 列名模式 | 说明 | |------------------------|----------------------------------------------------------------------| | `S0_read`至`S4_read` | 内存端口0至4的读取带宽 | | `S0_write`至`S4_write` | 内存端口0至4的写入带宽 | #### 功耗遥测 | 字段名 | 说明 | |----------------|----------------------------------------------------------------------| | `arm_power` | ARM CPU子系统的瞬时功耗 | | `fpga_power` | FPGA逻辑单元的瞬时功耗 | #### CPU利用率（ARM Cortex-A53） | 字段名 | 说明 | |----------------|----------------------------------------------------------------------| | `cpu_0`、`cpu_1`、`cpu_2`、`cpu_3` | 四个ARM Cortex-A53核心的利用率 | #### 内存指标 | 字段名 | 说明 | |--------------------|----------------------------------------------------------------------| | `memory_available` | 采样时刻的可用系统内存 | | `memory_total` | 系统总内存 | | `swap_free` | 可用交换空间 | #### 实验关联字段 | 字段名 | 说明 | |--------------------|----------------------------------------------------------------------| | `experiment_id` | 与`experiments.csv`中的索引及文件名匹配的实验标识符 | 🚀 数据集使用方法 可基于以下参数从`experiments.csv`中选择目标实验： - DPU配置（DPU尺寸、DPU计算单元数量） - 模型变体（`Model`字段） - 工作负载模式（`Workload Mode`字段） 随后打开对应的遥测轨迹文件：`data/<experiment_id>.csv`，即可开展以下分析： - 推理延迟拆解（预处理/推理/后处理延迟） - 单线程吞吐量（`fps_K`指标） - 内存带宽使用情况（`S*_read`、`S*_write`指标） - 不同负载下的CPU利用率与功耗特性 🎯 预期用途 本数据集适用于： - FPGA性能分析 - ML推理基准测试 - 系统级遥测研究 - 加速器与CPU交互相关研究 本数据集基于受控实验环境构建，并非生产级部署场景。 🤝 致谢与资助 本研究隶属于MLSysOps项目，由欧盟地平线欧洲研究与创新计划资助（资助协议编号：101092912）。更多信息请访问：https://mlsysops.eu/