A large scale photonic matrix processor enabled by charge accumulation

Integrated neuromorphic photonic circuits aim to power complex artificial neural networks (ANNs) in an energy and time efficient way by exploiting the large bandwidth and the low loss of photonic structures. However, scaling photonic circuits to match the requirements of modern ANNs still remains challenging. In this perspective, we give an overview over the usual sizes of matrices processed in ANNs and compare them with the capability of existing photonic matrix processors. To address shortcomings of existing architectures, we propose a time multiplexed matrix processing scheme which virtually increases the size of a physical photonic crossbar array without requiring any additional electrical post-processing. We investigate the underlying process of time multiplexed incoherent optical accumulation and achieve accumulation accuracy of 98.9% with 1 ns pulses. Assuming state of the art active components and a reasonable crossbar array size, this processor architecture would enable matrix vector multiplications with 16,000 × 64 matrices all optically on an estimated area of 51.2 mm2, while performing more than 110 trillion multiply and accumulate operations per second.

集成神经形态光子电路（integrated neuromorphic photonic circuits）旨在通过利用光子结构的大带宽与低损耗特性，以高能效、低时延的方式赋能复杂人工神经网络（ANNs）。然而，要使光子电路的规模适配现代人工神经网络的需求，仍存在诸多挑战。本展望综述中，我们梳理了人工神经网络中待处理矩阵的典型尺寸，并将其与现有光子矩阵处理器的性能能力进行对比。针对现有架构的短板，我们提出一种时分复用（time multiplexed）矩阵处理方案，该方案可在无需额外电学后处理的前提下，从虚拟层面拓展物理光子交叉开关阵列（photonic crossbar array）的尺寸规模。我们对时分复用非相干光学累加（incoherent optical accumulation）的核心过程展开研究，在采用1纳秒脉冲的条件下，实现了98.9%的累加精度。假设采用当前最先进的有源器件，并配置合理的交叉开关阵列尺寸，该处理器架构可在预估面积51.2平方毫米的范围内，全光学完成16000×64规模矩阵的向量乘法运算，每秒可实现超过110万亿次乘累加（multiply and accumulate）操作。