Table_1_CoreNEURON : An Optimized Compute Engine for the NEURON Simulator.pdf

The NEURON simulator has been developed over the past three decades and is widely used by neuroscientists to model the electrical activity of neuronal networks. Large network simulation projects using NEURON have supercomputer allocations that individually measure in the millions of core hours. Supercomputer centers are transitioning to next generation architectures and the work accomplished per core hour for these simulations could be improved by an order of magnitude if NEURON was able to better utilize those new hardware capabilities. In order to adapt NEURON to evolving computer architectures, the compute engine of the NEURON simulator has been extracted and has been optimized as a library called CoreNEURON. This paper presents the design, implementation, and optimizations of CoreNEURON. We describe how CoreNEURON can be used as a library with NEURON and then compare performance of different network models on multiple architectures including IBM BlueGene/Q, Intel Skylake, Intel MIC and NVIDIA GPU. We show how CoreNEURON can simulate existing NEURON network models with 4–7x less memory usage and 2–7x less execution time while maintaining binary result compatibility with NEURON.

NEURON模拟器（NEURON）历经三十余年开发，已被神经科学家广泛用于神经元网络电活动的建模研究。采用NEURON的大型网络模拟项目，其单项目超级计算机算力分配可达数百万核心时量级。超级计算机中心正逐步向新一代计算架构转型，若NEURON能够更好适配这些新型硬件能力，此类模拟的每核心小时能效可提升一个数量级。为使NEURON适配不断演进的计算机架构，研究人员已将NEURON的计算引擎抽离并优化为一款名为CoreNEURON的函数库（CoreNEURON）。本文阐述了CoreNEURON的设计思路、实现方案与优化策略。我们介绍了CoreNEURON作为函数库与NEURON协同工作的方式，并在包括IBM BlueGene/Q、英特尔Skylake、英特尔MIC以及NVIDIA GPU在内的多种架构上，对比了不同网络模型的性能表现。我们通过实验证实，CoreNEURON可在保持与NEURON二进制结果兼容性的前提下，模拟现有NEURON网络模型时，内存占用降低4至7倍，执行时间缩短2至7倍。