A non-isolated extended voltage gain quadratic boost converter with reduced device voltage stress and continuous input current

This article presents an improved model of a high voltage gain DC-DC converter topology. The voltage gain of the proposed topology is extended using a newly structured cascaded boost converter with voltage doubler cells along with the Super Luo structure in the network. The ultimate aim is to improve the output voltage gain of the proposed converter to a higher level with a lower duty cycle. Additionally, the design considerations minimize the voltage stress of the components (diodes, capacitors, and semiconductor switches) compared to the conventional topology. Moreover, the proposed topology ensures a continuous input current to the structure. Mathematical modeling is developed using steady-state analysis, and the results are analyzed using the MATLAB/Simulink. Finally, the proposed converter provides a high gain, that is, 10, at a lower duty cycle of 0.32 with reduced voltage stress on the components.

本文提出一种改进型高增益直流-直流（DC-DC）变换器拓扑结构模型。所提拓扑通过在电路网络中集成带有倍压单元的新型级联升压变换器与超级卢（Super Luo）结构，拓展了电压增益区间。本研究的核心目标为在更低占空比条件下，将所提变换器的输出电压增益提升至更高水平。此外，相较于传统拓扑结构，本设计方案可有效降低二极管、电容及半导体开关等元器件的电压应力。同时，所提拓扑可保证输入端电流连续。本文通过稳态分析建立了该变换器的数学模型，并基于MATLAB/Simulink平台对仿真结果进行了分析。最终，所提变换器可在占空比为0.32的低占空比工况下实现10倍的高电压增益，且元器件电压应力显著降低。