HPC in a Vacuum: Evaluating Future Space Microprocessors

Advanced algorithms dictated by future mission needsare pushing space-borne computing requirements. Current platformsused in manned and unmanned spaceflight are limitedby the intersection of radiation tolerance, power consumption,computing performance and safety critical features. Until recently,advanced instruction set architectures (ISAs), algorithmspecific instructions, high speed external interfaces and highperformance on-chip networks were eschewed from processordesigns and current production spacecraft processors are basedon past computing paradigms.Advances in processor manufacturing, emerging ISAs and machinelearning techniques will significantly impact future systemon-chip (SoC) designs, enabling true high-performance spacecomputing. To better understand the computational requirementsof modern spacecraft, a comprehensive set of benchmarksthat include basic system characterization, high performancecomputing, navigation and landing, image recognition, routefinding, data mining and machine learning are necessary tocharacterize candidate architectures. The analysis of these spaceflight focused algorithms will drive the design of next generationspace computing SoCs.

未来任务需求驱动的先进算法，正不断抬升星载计算的性能门槛。当前用于载人及无人航天任务的计算平台，均受限于抗辐射性能、功耗、计算性能与安全关键特性之间的多重约束平衡。直至近年，先进指令集架构（Instruction Set Architectures, ISAs）、面向专用算法的指令、高速外部接口以及高性能片上网络，均未被纳入航天处理器的设计考量范畴；当前量产的航天处理器仍基于过往的计算范式。处理器制造工艺的进步、新兴指令集架构与机器学习技术，将对未来片上系统（System-on-Chip, SoC）的设计产生深远影响，助力实现真正意义上的高性能星载计算。为深入理解现代航天器的计算需求，亟需一套涵盖基础系统特性表征、高性能计算、导航与着陆、图像识别、路径规划、数据挖掘及机器学习等领域的综合性基准测试套件，以对候选架构开展性能表征与评估。针对这类航天专用算法的分析研究，将推动下一代星载计算片上系统的设计研发。