Repository for PromptRTL: Evaluating Prompt Engineering for Hardware Design
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下载链接：
https://zenodo.org/record/15029586
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资源简介：
Prompt RTL conducts a comprehensive evaluation of state-of-the-art prompt engineering techniques in the context of hardware design, with a specific focus on generating functional Verilog.
创建时间：
2025-03-15
