Ultra-low power logic in memory with commercial grade memristors and FPGA-based smart-IMPLY architecture

This repository contains the dataset relative to the publication: L. Benatti, T. Zanotti, P. Pavan, and F. M. Puglisi, “Ultra-low power logic in memory with commercial grade memristors and FPGA-based smart-IMPLY architecture,” Microelectronic Engineering, vol. 280, p. 112062, Aug. 2023, doi: 10.1016/j.mee.2023.112062. In this folder, you will find MATLAB workspaces containing: caratterizzazione_rram: The measured values of resistances (LRS and HRS) of the three SDC-memristors used for validating the SIMPLY architecture. The stability of these memristors has been validated over multiple cycles, as shown in Figure 7b. energia_operazioni: The experimental values of energy versus time (pulse amplitude) for individual operations of SIMPLY, depicted in Figure 9.