基于28nm STT-MRAM 1Mb存储模块设计数据

该设计数据来源于中电海康集团有限公司，背景为参与大规模、高能效存算一体项目进行器件和芯片制备，为1Mb MRAM IP的存储模块设计数据，的lef文件，可用于IP集成时做LVS。 文件lib为mram IP的lib文件，在数字设计过程中用于进行DC综合。 文件nto_mram_1mb.v的仿真文件为mram IP的行为级仿真模型，在数字设计过程中用于verilog模型仿真与功能验证。This design data originates from China Electronics Hikvision Group Co., Ltd. It includes LEF files for the 1Mb MRAM IP memory module, which was developed for device and chip fabrication in large-scale, high-efficiency memory-computing integrated projects, and can be employed for LVS verification during IP integration. The LIB file is the standard library file for the MRAM IP, utilized for DC synthesis in digital design workflows. The file nto_mram_1mb.v acts as the behavioral-level simulation model of the MRAM IP, and is used for Verilog model simulation and functional verification during digital design processes.

搜集汇总

背景与挑战

背景概述

该数据集由中电海康集团有限公司提供，包含基于28nm STT-MRAM技术的1Mb存储模块设计数据，源自大规模、高能效存算一体项目。它提供了lef、lib和verilog仿真文件，分别用于IP集成时的LVS检查、数字设计的DC综合以及功能验证。